Janier Arias Garcia

Group Links

  •   MACRO Group
  •   LITC laboratory
  • Prof. Janier Arias Garcia

      see Curriculum Lattes available only in Portuguese   see Google Scholar

    I'm an assistant professor with the Department of Electronic Engineering (DELT) and a permanent member of the Graduate Program in Electrical Engineering (PPGEE), at the Federal University of Minas Gerais (UFMG), Brazil. Since 2016 member of the Mechatronics, Control, and Robotics research group (MACRO) and an associate professor in the Computational Intelligence Laboratory (LITC).

    I received the BS degree in Engineering Physics from the University of Cauca (Colombia 2007) and MS and Doctor degree, both in Mechatronic Systems from the University of Brasilia (UnB 2010 and 2014, respectively).

    Research Interests

    Briefly, I research computer architecture, systems, hardware security, and intelligence for embedded systems. My work focus now is on energy efficiency spanning to theory and practice of using reconfigurable hardware systems and their synthesis tools to describe better circuit synthesis techniques allowing a controlled trade-off among stability, numerical accuracy, and key design parameters such as area, performance, power, etc.

    At present, I have been working on the development of embedded systems for high-performance Gabriel’s graph classifiers using reconfigurable hardware architectures, as well as digital circuits for processing and execution of chaotic cryptosystems. Recently, I have become especially interested in focusing on emerging memory paradigms (in-memory processing), avoiding the old von Neumann paradigm to be applied in latency-sensitive applications into the new edge computing parading.